Work Experience

Software Engineering Intern, Cadence Design Systems

July - December 2018, Chelmsford, MA

  • Added new placement area tool for system floorplanner and design product.

  • Designed and programmed a GUI using C++ to display used and available package placement area based on board geometry keepins and keepouts for each PCB as well as the system.

  • Established a relationship between Northeastern and Cadence and presented on company products, structure, and dynamics at IEEE weekly meeting.

 

Undergraduate Research Assistant, NU MONET

September 2017 - February 2018, Boston, MA

  • Designed and implemented solar charging solutions for wireless underwater acoustic buoy sensor network.

  • Participated in buoy assembly and deployment; performed data analysis on networking experiments run from shore.

 

Systems Design Engineering Intern, CNEX Labs

May 2017 - September 2017, San Jose, CA

  • Designed and programmed a GUI based demo to showcase SSD performance that won Best in Show at Flash Memory Summit (FMS) 2017.

  • Performed schematic validation, board debug and bringup.

  • Designed labels with Illustrator for U.2 SSD products and banners to be displayed at FMS.

  • Managed board prototype fabrication process by coordinating with vendors, visiting assembly houses and handling board build logistics to keep systems design team on schedule.

  • Added new command to lnvm tool to monitor and log sysfs files exposed by pblk.

 

Electrical Engineering Intern, Nantero

June 2015 - August 2015, Sunnyvale, CA

  • Wrote Perl scripts to enable CAD engineers to more efficiently utilize tools and analyze simulation data.

  • Learned basic analog circuit design. Set up, configured, and installed batch servers in the lab.

  • Performed extensive testing on wafers to validate chip designs.

 

June 2015 - August 2015, Sunnyvale, CA

Engineering Intern, Dell EMC

June 2014 - August 2014, Menlo Park, CA

  • Assisted with circuit board layout and part library validation. Measured impedance along circuit board traces to ensure build quality using a TDR.

  • Validated connector, circuit board, and cable designs using a VNA, oscilloscope, and spectrum analyzer.

  • Performed EMI testing and minor rework.

 

Engineering Intern, DSSD

June 2013 - August 2013, Menlo Park, CA

  • Set up, configured and installed Linux servers in the new datacenter.  

  • Performed SMD rework and collected micro-ohm resistance readings to validate circuit board designs.

 
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©2018 Geralyn Moore